Zero-Drift Amplifiers Offer Superior Precision at the Cost of Time Domain Performance
Kevin Tretter, Microchip Technology
Zero-drift amplifiers, meaning amplifiers that implement a continuously self-correcting architecture, have received a lot of fanfare due to the high level of DC precision that they enable. Although this attention is well deserved, there is a down side to this superior precision: the amplifiers’ time domain performance.
Before delving into the time domain aspects of these zero-drift amplifiers, it’s beneficial to review the basic architecture used within many of these devices. The following figure provides a high-level look at a chopper-stabilized architecture, such as that used on many of the MCP6Vxx zero-drift amplifiers from Microchip.
The chopper-stabilized amplifier has two signal paths: a high-bandwidth path that is always connected to the main amplifier, and a lower-bandwidth auxiliary path. The main amplifier is designed for high bandwidth and determines the specified gain bandwidth product and slew rate of the overall amplifier.
The input signal is also routed through the auxiliary path, which has chopper switches at both the inputs and the outputs, followed by a filter stage before being added back to the main amplifier path. The auxiliary amplifier in this secondary path has extremely high gain, enabling it to correct offsets from millivolts down to microvolts. Now that we have a fundamental understanding of this architecture, let’s explore how this affects the time domain performance of the amplifier. We’ll first consider a large-scale step response on the input of the amplifier, an example of which is shown in Figure 2.
Figure 2: Example of Large-Scale Step
Response on Amplifier Input
In this example, the input voltage (shown in red) is stepping from approximately 200 mV up to 5.2V nearly instantly. The output voltage of the unity gain amplifier (shown in blue) attempts to match this step response, but is slew limited and takes additional time for the output to settle to its final value.
This is an especially difficult situation for self-correcting architectures. As discussed earlier, the higher-bandwidth signal path within the zero-drift amplifier is responsible for the overall speed (gain bandwidth and slew rate). However, once the new value of a step response is reached, the output has to then settle to within the low offset limits of the zero-drift amplifier (typically less than 50 µV).
This involves the bandwidth-limited auxiliary path and, therefore, is largely a function of the chopping frequency. The use of higher clock frequencies has enabled relatively fast settling times, but for zero-drift amplifiers, these are typically in the tens of microseconds or higher. However, higher chopping frequencies can lead to an increase in the final corrected offset voltage, which typically takes priority for precision designs. Another time domain aspect of zero-drift amplifiers that must be considered is start-up behavior.
When the amplifier first powers up, there is a brief period of time in which the output of the amplifier will reflect the uncorrected offset error of the main amplifier (as shown in Figure 1).
Figure 1: Chopper-Stabilized Amplifier Architecture
Once the supply voltage reaches the trip point, as defined by the amplifier’s power-on reset circuitry, the auxiliary correction path requires a few clockcycles before the output of the main amplifier is back within the specified offset levels.
Typically this start-up time is well within the start-up time of the entire system in which the amplifier operates and, therefore, isn’t an issue. However, if the amplifier is configured for high closed-loop gain, the momentary uncorrected offset (which may be as high as ±5 mV) at the output of the amplifier may cause the amplifier to rail. In this case, the start-up time will also need to include the time it takes for the amplifier to return to its linear operating region. The datasheets for Microchip’s zero-drift amplifiers provide a typical value for this overdrive recovery time.
Zero-drift amplifiers provide a lot of advantages for a wide variety of applications, delivering outstanding DC performance and superior accuracy across time and temperature. However, as we’ve discussed, the downside of these self-correcting architectures is their time domain performance. Modern-day designs have strived to make these trade-offs as small as possible, but it is still worthwhile for a system designer to be aware of these potential issues. Please visit the Operational Amplifiers page on the Microchip website to learn more about our line of operational amplifiers, including zero-drift amplifiers
LATEST issue 4/2019
The main topics of this year’s edition of the world’s leading trade fair for electronics development and production productronica 2019 are Smart Factory and Smart Maintenance. Mode details you can find here...
Тhis year’s edition of Europe’s trade fair for electronics design and manufacturing innovations and applications SEMICON Europa, traditionally co-located with productronica, will highlight smart technologies...